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A3984SLPTR-T
Category: Motor Controller and Driver ICsAllegro MicroSystems |
Allegro MicroSystems | Microstepping Motor Driver 24-Pin TSSOP EP T/R
Packaging: N/A
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CRCW02010000Z0ED
Category: Fixed Resistors, No Category, Zero Ohm ResistorsVishay |
Vishay | N/A
Packaging: TAP
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TPS7B8450QDCYRQ1
Category: Linear RegulatorsTexas Instruments |
Texas Instruments | LDO Regulator Pos 5V 0.15A Automotive 4-Pin(3+Tab) SOT-223 T/R
Packaging: N/A
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| 2,500 | Log in to view |
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IR3550MTRPBF
Category: DC to DC Converter and Switching Regulator ChipInfineon Technologies |
Infineon Technologies | Conv DC-DC 4.5V to 15V Synchronous Step Down Single-Out 0.25V to 4.5V 60A 32-Pin PQFN EP T/R
Packaging: N/A
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MT25QL128ABA1ESE-0SIT TR
Category: FlashMicron Technology |
Micron Technology | NOR Flash Serial (SPI, Dual SPI, Quad SPI) 3V/3.3V 128M-bit 128M/64M/32M x 1/2-bit/4-bit 6ns 8-Pin SOIC W T/R
Packaging: N/A
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| 1,500 | Log in to view |
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NCV551SN14T1G
Category: LDO Voltage Regulatorsonsemi |
onsemi | The NCP551 series of fixed output low dropout (LDO) linear voltage regulators are designed for applications which require low quiescent current. The NCP551 series features an ultra-low quiescent current of 4.0 µA. Each device contains a voltage reference unit, an error amplifier, a PMOS power transistor, resistors for setting output voltage, current limit, and temperature limit protection circuits.The NCP551 has been designed to be used with low cost ceramic capacitors and requires a minimum output capacitor of 0.1 µF. The device is housed in the micro miniature TSOP-5 surface mount package. Standard voltage versions are 1.4, 1.5, 1.8, 2.5, 2.7, 2.8, 3.0, 3.3, and 5.0 V. Other voltages are available in 100 mV steps.
Packaging: TR
Supplier Type: Partner Stock | Log in to view | | | Qty | Price |
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GCJ31CR71E475KA12L
Category: Multilayer Ceramic Capacitors, No Category, SMD MLCC Multilayer Ceramic CapacitorsMurata |
Murata | N/A
Packaging: TR
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GCM21BR70J106KE22L
Category: Capacitor Ceramic Multilayer, Multilayer Ceramic Capacitors, SMD MLCC Multilayer Ceramic CapacitorsMurata |
Murata | N/A
Packaging: TR
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RC2512JK-0710RL
Category: Passive Components, Surface Mount ResistorsYAGEO |
YAGEO | N/A
Packaging: TR
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GCM1885C1H471JA16D
Category: Multilayer Ceramic Capacitors, No Category, SMD MLCC Multilayer Ceramic CapacitorsMurata |
Murata | N/A
Packaging: TR
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GCM188R71E473KA37D
Category: Capacitor Ceramic Multilayer, SMD MLCC Multilayer Ceramic CapacitorsMurata |
Murata | N/A
Packaging: TR
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AP0101AT2L00XPGA0-DR
Category: Electromechanical, Image Sensorsonsemi |
onsemi | AP0101AT is a dedicated automotive image co-processor that enables flexible camera platforms using high performance ON Semiconductor megapixel high dynamic range (HDR) sensors. The two-chip solution of sensor and co-processor allows for multiple camera price and performance points with re-use of circuit board design, fast time to market and design flexibility. Sensor performance is enhanced by the reduction in heat resulting from a separate co-processor chip while at the same time enabling high performance features. The AP0101AT is ideal for Automotive Digital Surround View Systems. It works with ON Semiconductor's AR0132AT HDR automotive sensor.
Packaging: TRY
Supplier Type: Partner Stock | Log in to view | | | Qty | Price |
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MCP2551T-I/SN
Category: Can, CAN Interfaces, CAN Transceivers, Controller Area NetworkMicrochip |
Microchip | The MCP2551 is a high-speed CAN, fault-tolerant device that serves as the interface between a CAN protocol controller and the physical bus. The MCP2551 device provides differential transmit and receive capability for the CAN protocol controller, and is fully compatible with the ISO-11898 standard, including 24V requirements. It will operate at speeds of up to 1 Mb/s.Typically, each node in a CAN system must have a device to convert the digital signals generated by a CAN controller to signals suitable for transmission over the bus cabling (differential output). It also provides a buffer between the CAN controller and the high-voltage spikes that can be generated on the CAN bus by outside sources (EMI, ESD, electrical transients, etc.).
Packaging: TAP
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LTC6226HS8#PBF
Category: Op Amps, Operational AmplifiersAnalog Devices, Inc. |
Analog Devices, Inc. | Op Amp Single Low Noise Amplifier R-R O/P ±5.875V/11.75V 8-Pin SOIC N Tube
Packaging: N/A
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| 200 | Log in to view |
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VCAS080514C300DP
Category: Varistors Mov MlvAVX |
AVX | VC Series 0805 14 VDC 32 V Clamp 120 A 900 pF SMT Multilayer Ceramic Varistor
Packaging: REEL
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ADN8833ACBZ-R7
Category: Specialized Power ICs and ModulesAnalog Devices, Inc. |
Analog Devices, Inc. | Thermoelectric Cooler 25-Pin WLCSP T/R
Packaging: N/A
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MKL16Z128VFM4
Category: MCUsNXP Semiconductors |
NXP Semiconductors | MCU 32-bit ARM Cortex M0+ RISC 128KB Flash 1.8V/2.5V/3.3V 32-Pin QFN EP Tray
Packaging: N/A
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MK64FN1M0VLL12R
Category: MCUsNXP Semiconductors |
NXP Semiconductors | MCU 32-bit ARM Cortex M4 RISC 1MB Flash 2.5V/3.3V 100-Pin LQFP T/R
Packaging: N/A
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ATMEGA8A-AUR
Category: 8 Bit Microcontrollers, MCUsMicrochip |
Microchip | The Microchip AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The ATmega8A provides the following features: 8K bytes of In-System Programmable Flash with ReadWhile- Write capabilities, 512 bytes of EEPROM, 1K byte of SRAM, 23 general purpose I/O lines, 32 general purpose working registers, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, one byte oriented Two-wire Serial Interface, a 6- channel ADC (eight channels in TQFP and QFN/MLF packages) with 10-bit accuracy, a programmable Watchdog Timer with Internal Oscillator, an SPI serial port, and five software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, one SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next Interrupt or Hardware Reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low-power consumption. Microchip offers the QTouch library for embedding capacitive touch buttons, sliders and wheels functionality into AVR microcontrollers. The patented charge-transfer signal acquisition offers robust sensing and includes fully debounced reporting of touch keys and includes Adjacent Key Suppression (AKS ) technology for unambiguous detection of key events.
Packaging: TR
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| 2,000 | Log in to view |
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TJA1043TK/1Y
Category: CAN Interfaces, CAN Transceivers, Controller Area NetworkNXP |
NXP | The TJA1043 high-speed CAN transceiver provides an interface between a Controller Area Network (CAN) protocol controller and the physical two-wire CAN bus. The transceiver is designed for high-speed CAN applications in the automotive industry, providing differential transmit and receive capability to (a microcontroller with) a CAN protocol controller. The TJA1043 belongs to the third generation of high-speed CAN transceivers from NXP Semiconductors, offering significant improvements over first- and second-generation devices such as the TJA1041A. It offers improved ElectroMagnetic Compatibility (EMC) and ElectroMagnetic Discharge (ESD) performance, very low power consumption, and passive behavior when the supply voltage is turned off. Advanced features include: The TJA1043 implements the CAN physical layer as defined in the current ISO11898 standard (ISO11898-2:2003, ISO11898-5:2007). Pending the release of the updated version of ISO11898-2 including CAN FD, additional timing parameters defining loop delay symmetry are specified. This implementation enables reliable communication in the CAN FD fast phase at data rates up to 2 Mbit/s. These features make the TJA1043 the ideal choice for high speed CAN networks containing nodes that need to be available all times, even when the internal VIO and VCC supplies are switched off.
Packaging: TAP
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