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TLC59116IRHBR

Category: LED DriversTexas Instruments

Texas Instruments

LED Driver 16 Segment 37000uA Supply Current 32-Pin VQFN EP T/R

Packaging: N/A
Supplier Type: Partner Stock

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MT41K64M16TW-107:J

Category: DRAM Chip, DRAMsMicron

Micron

DDR3 SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is an 8n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write operation for the DDR3 SDRAM effectively consists of a single 8n-bit-wide, four-clock cycle data transfer at the internal DRAM core and eight corresponding n-bit-wide, one half-clock-cycle data transfers at the I/O pins. The differential data strobe (DQS, DQS#) is transmitted externally, along with data, for use in data capture at the DDR3 SDRAM input receiver. DQS is center-aligned with data for WRITEs. The read data is transmitted by the DDR3 SDRAM and edge-aligned to the data strobes. The DDR3 SDRAM operates from a differential clock (CK and CK#). The crossing of CK going HIGH and CK# going LOW is referred to as the positive edge of CK. Control, command, and address signals are registered at every positive edge of CK. Input data is registered on the first rising edge of DQS after the WRITE preamble, and output data is referenced on the first rising edge of DQS after the READ preamble. Read and write accesses to the DDR3 SDRAM are burst-oriented. Accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of an ACTIVATE command, which is then followed by a READ or WRITE command. The address bits registered coincident with the ACTIVATE command are used to select the bank and row to be accessed. The address bits registered coincident with the READ or WRITE commands are used to select the bank and the starting column location for the burst access. The device uses a READ and WRITE BL8 and BC4. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst access. As with standard DDR SDRAM, the pipelined, multibank architecture of DDR3 SDRAM allows for concurrent operation, thereby providing high bandwidth by hiding row precharge and activation time. A self refresh mode is provided, along with a power-saving, power-down mode.

Packaging: TRY
Supplier Type: Partner Stock

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RC0805FR-07249RL

Category: Resistor Fixed Single, Surface MountYageo

Yageo

Res Thick Film 0805 249 Ohm 1% 0.125W(1/8W) ±100ppm/°C Pad SMD T/R

Packaging: N/A
Supplier Type: Partner Stock

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MCP9700AT-E/TT

Category: Electromechanical, Temperature, Temperature and Humidity Sensors, Temperature SensorsMicrochip

Microchip

The MCP9700A family of Linear Active Thermistor™ Integrated Circuit (IC) is an analog temperature sensor that converts temperature to analog voltage. It's a low-cost, low-power sensor with an accuracy of ±2°C from 0°C to +70°C while consuming 6 µA (typical) of operating current.Unlike resistive sensors (such as thermistors), the Linear Active Thermistor IC does not require an additional signal-conditioning circuit. Therefore, the biasing circuit development overhead for thermistor solutions can be avoided by implementing this low-cost device. The voltage output pin (VOUT) can be directly connected to the ADC input of a microcontroller. The MCP9700A temperature coefficients are scaled to provide a 1°C/bit resolution for an 8-bit ADC with a reference voltage of 2.5V and 5V, respectively.The MCP9700A provide a low-cost solution for applications that require measurement of a relative change of temperature. When measuring relative change in temperature from +25°C, an accuracy of ±1°C (typical) can be realized from 0°C to +70°C. This accuracy can also be achieved by applying system calibration at +25°C.In addition, this family is immune to the effects of parasitic capacitance and can drive large capacitive loads. This provides Printed Circuit Board (PCB) layout design flexibility by enabling the device to be remotely located from the microcontroller. Adding some capacitance at the output also helps the output transient response by reducing overshoots or undershoots. However, capacitive load is not required for sensor output stability.

Packaging: TAP
Supplier Type: Partner Stock

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LPC1765FBD100K

Category: 32 Bit Microcontrollers, MCUsNXP

NXP

LPC17xx Series 128 kB Flash 64 kB RAM SMT 32-Bit-Microcontroller - LQFP-100

Packaging: TRAY
Supplier Type: Partner Stock

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STM32H743ZIT6

Category: 32 Bit Microcontrollers, ARM Microcontrollers, MCUsSTMicroelectronics

STMicroelectronics

The STM32H743xI devices are based on the high-performance ARM Cortex-M7 32-bit RISC core operating at up to 400 MHz frequency. The Cortex-M7 core features a floating point unit (FPU) which supports ARM double-precision (IEEE 754 compliant) and singleprecision data-processing instructions and data types. The STM32H743xI support a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.The STM32H743xI devices incorporate high-speed embedded memories with a dual-bank Flash memory up to 2 Mbytes, around 1 Mbytes of RAM (including 192 Kbytes of TCM RAM, 864 Kbytes of user SRAM and 4 Kbytes of backup SRAM), as well as an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses, a 32-bit multi-AHB bus matrix and a multi-layer AXI interconnect supporting internal and external memories access.All the devices offer three ADCs, two DACs, two ultra-low power comparators, a low-power RTC, a high-resolution timer, 12 general-purpose 16-bit timers, two PWM timers for motor control, five low-power timers, a true random number generator (RNG). The devices support four digital filters for external sigma delta modulators (DFSDM). They also feature standard and advanced communication interfaces.

Packaging: BLK
Supplier Type: Partner Stock

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