DRAM, DDR3, 4 Gbit, 256M x 16bit, 800 MHz, FBGA, 96 Pins AS4C256M16D3C-12BCN is a 256M x 16bit DDR3 synchronous DRAM (SDRAM). The 4Gb double-data-rate-3 DRAM is a double data rate architecture to achieve high-speed operation. It is internally configured as an eight-bank DRAM. The 4Gb chip is organized as 32Mbit x 16I/Os x 8 bank devices. This synchronous device achieves high-speed double-data-rate transfer rates of up to 2133Mb/sec/pin for general applications. The chip is designed to comply with all DDR3 DRAM key features and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK# falling). All I/Os are synchronized with differential DQS pairs in a source-synchronous fashion.
